A four-address machine could have a next-instruction address in every instruction, so it doesn't need an incrementing PC and programs need not be sequential in memory. Read up on 'The Story of Mel' if you like! More helpfully: the is a machine, like many others, with some support for a stack. Posted: Mon Dec 04, pm. If the is not a stack machine, why is there a "stack pointer" and instructions like POP? Posted: Thu Dec 07, pm. Thank you a lot you wonderful people but, I am reading a book called "Programming The " by Rodnay Zaks.
There it explained that the memory is divided into pages bytes each and that the stack is the page 1 of memory What if my memory has only one page?
What if my memory has no page at all? It also explained that POP just pulls a value from the top of the stack and PUSH pushes a value to the top since stack memory can only be accessed one address at a time. This might be a good test of your understanding of memory decoding!
The has 16 address lines, and will always use 16 bit addresses. Which RAM chips serve those addresses - if any - is down to the system design, and specifically the glue logic which activates the RAM chips for each access. If it happens that the size of the RAM is very small - say for example just 64 bytes - then the same RAM locations will serve for page zero, page one, and many other pages.
The doesn't care. The software which is running will need to be organised in such a way that the 64 bytes is enough, and the zero page usage doesn't interfere with the stack usage. Yes, kind of. But note that some operations cause multiple stack accesses and therefore, in rapid succession, access multiple bytes within the stack. Hope this helps.
Possibly you're thinking of the term 'page' as if it was something like the term 'bank' whereby there are several areas of physical memory which can go in and out of the memory map.
References Publications referenced by this paper. Re:Size and functionality Score: 4 , Insightful. A few old Burroughs mainframes. Theres a reason that mainstream processors haven't picked up on "Stack Processors", and it has nothing to do with binary compatibility, the difficulty of writing a compiler for their instruction set, or general programming complexity. No arbitrarily-addressable memory is presented to the programmer.
That's not the same thing. Here's an example where having a RAM size even less than a whole byte page still lets you have zero-page ZP, or page-0 access for the extra addressing modes available there, and page-1 access for hardware-stack use. Hopefully it's not too hard to follow. Suppose you make your address decoding in a simple system such that RAM is selected anytime A15 and A14 are low.
So is there ZP access? Is there page-1 access for the hardware stack?
Again, yes. Is there access above that? Yes, but there's no reason to use it with so little RAM, since ZP access is more efficient, and there's nothing you can do with RAM in other pages that you can't do in page 0 or 1 except accommodate more memory which we don't have in this case. BTW, parlance uses "pull" instead of "pop" for the opposite of push; so when you see "pull" in the books and data sheets, don't be confused. It's the same thing as "pop" in other processors. It makes more sense to me anyway, since "pop" implies some kind of small explosive rupture, along with the accompanying noise.
We ain't got no x We don't NEED no stinking x86! Page 1 of 2. Previous topic Next topic. DerTrueForce wrote: As I understand it, a stack machine uses only stacks. The stack machine always allows arbitrary addressing and indexing of memory; but addresses and indexes go through the data stack which is separate from the return stack, simplifying various things.
So for example let's say you have 32 cells available for a data stack, but you have 50 variables. No problem. From there, you can store data to it, fetch data from it, increment the variable, etc.. Details if other :.
Thanks for telling us about the problem. Return to Book Page. Preview — Stack Computers by Philip Koopman.
Published in , this was the first book to explore the new breed of stack computers led by the introduction of the Novix NC chip. The author commences with an overview of how stacks are used in computing, and a taxonomy of hardware stack support which includes a survey of approximately 70 stack machines past and present. Detailed descriptions, including block diagra Published in , this was the first book to explore the new breed of stack computers led by the introduction of the Novix NC chip.
Major topics covered also include architectural analysis of stack machines, software issues, application areas, and potential for future development. Get A Copy. Kindle Edition , pages. More Details Friend Reviews. To see what your friends thought of this book, please sign up. To ask other readers questions about Stack Computers , please sign up.
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Sort order. May 04, David rated it liked it. First few chapters give a good background into the different types of stack computers. But there is little attempt to show the differences in code that a compiler would have to produce. The latter chapters concentrate on the different types of processors with a few sample instructions. I would have liked to have seem more examples of the code that a compiler would produce for the different types of stack architecture, so that we could really understand the difference.
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